Previous Year Very Short Questions of DCLD (B-TECH electronics and communication engineering 3rd)

Digital circuits and logic design

Previous year question paper with solutions for Digital circuits and logic design

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  1. Why Gray code is used in labeling the rows and columns in K-Map?
  2. Give the advantages of Totem Pole Output in TTL ICs.
  3. What is race around condition?
  4. Realize three input NAND gate using three input NOR gates only.
  5. Justify with example, the Self-Complementing property of Excess-3 Code.
  6. Define the terms resolution and Linearity for an ADC.
  7. Convert (100.55)8 into Binary and Hexadecimal numbers.
  8. Add –89.75 to +43.25 using 2’s complement method.
  9. Convert (F80B)16 to binary.
  10. Draw the circuit diagram of a diode AND gate and explain its working.
  11. Describe a simple four-line multiplexer.
  12. Differentiate between a fixed-point number and a floating-point number.
  13. Explain the working of a T flip-flop.
  14. Determine the minimum conversion interval of an ADC using an 8-stage counter with a clock frequency of 2MHz.
  15. Distinguish between address and contents of a memory location.
  16. Give one example each of an even and an odd parity generator, using suitable diagrams.
  17. Explain the difference between Gray code and the regular binary code.
  18. Perform the following subtraction using 10’s complement method: 196-155.
  19. Differentiate between saturated and non-saturated logic families.
  20. What is the MOD number of 5-bit counter?
  21. What is bufferregister?
  22. Draw the circuit of SR flip flop using NAND gates only.
  23. Why master slave FF is preferred to use?
  24. What are magnitude comparators?
  25. Realize XOR gate using NAND gates only.
  26. What do you mean by weighted code? Give examples
  27. Subtract using 9's, l0's, 1'sand 2's complement: (18-24)