Previous Year Very Short Questions of CA (B-TECH information technology 3rd)

Computer architecture

Previous year question paper with solutions for Computer architecture

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  1. Show with a block diagram how different components of a computer system are connected together.
  2. A computer uses memory unit of 512 words of 16 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code, a register code to specify one of 8registers and an address part. How many bits are there in each part?
  3. Perform the operation (–29) + (18) with binary numbers represented in signed 2's compliment form.
  4. Draw the bus architecture of 8085 MP.
  5. What are main characteristics of RISC processor architecture?
  6. How I/O devices communicate with each other?
  7. Define hit ratio.
  8. What do you mean by Transaction processing benchmark?
  9. List the operational modes of 8255 interface.
  10. Compare SIMD and MIMD machines.
  11. What is computer organization?
  12. What is the necessity of connecting variety of memory devices to a computer?
  13. What do you mean by hardware interrupt?
  14. How virtual memory is useful in memory hierarchy?
  15. List the functions of 8255.
  16. Compute (1010010)2 – (1000111)2 using 2’s complement.
  17. What is control memory?
  18. An 8-bit register contains the binary value 10000101. What is the register value after arithmetic shift left?
  19. What do you understand by the terms “loosely coupled” and “tightly coupled” in parallel computers?
  20. What is the role of shift registers in digital computers?
  21. What are the basic functional units of a computer?
  22. Draw the block diagram of a 2’s complement Subtractor.
  23. Explain the concept of virtual memory.
  24. Discuss the different types of ROMs.
  25. What is Inter-process communication?
  26. Draw a schematic diagram of the memory hierarchy.
  27. What is a priority Interrupt?
  28. Briefly discuss the basic organization of a micro programmed control unit.
  29. The address of a memory location to be accessed is in register R1 and the memory data are to be loaded into register R2. Specify the sequence of operations involved.
  30. Differentiate serial and parallel communication.