Previous year question paper for CAO (B-TECH Electronics and Communication Engineering 5th)

Computer Architecture and Organization

Previous year question paper with solutions for Computer Architecture and Organization from 2013 to 2018

Our website provides solved previous year question paper for Computer Architecture and Organization from 2013 to 2018. Doing preparation from the previous year question paper helps you to get good marks in exams. From our CAO question paper bank, students can download solved previous year question paper. The solutions to these previous year question paper are very easy to understand.

Section A

Boolean algebra and Logic gates, Combinational logic blocks(Adders, Multiplexers,

Encoders, de-coder), Sequential logic blocks(Latches, Flip-Flops, Registers, Counters) Store

program control concept, Flynn‟s classification of computers (SISD, MISD, MIMD);

Multilevel viewpoint of a machine: digital logic, micro architecture, ISA, operating systems,

high level language; structured organization; CPU, caches, main memory, secondary memory

units & I/O; Performance metrics; MIPS, MFLOPS.

Section B

Instruction Set Architecture:

Instruction set based classification of processors (RISC, CISC, and their comparison);

addressing modes: register, immediate, direct, indirect, indexed; Operations in the instruction

set; Arithmetic and Logical, Data Transfer, Control Flow; Instruction set formats (fixed,

variable, hybrid); Language of the machine: 8086 ; simulation using MSAM.

Section C

Basic non pipelined CPU Architecture and Memory Hierarchy & I/O

Techniques

CPU Architecture types (accumulator, register, stack, memory/ register) detailed data path of

a typical register based CPU, Fetch-Decode-Execute cycle (typically 3 to 5 stage);

microinstruction sequencing, implementation of control unit, Enhancing performance with

pipelining.

The need for a memory hierarchy (Locality of reference principle, Memory hierarchy in

practice: Cache, main memory and secondary memory, Memory parameters: access/ cycle

time, cost per bit); Main memory (Semiconductor RAM & ROM organization, memory

expansion, Static & dynamic memory types); Cache memory (Associative & direct mapped

cache organizations.

Section D

Introduction to Parallelism and Computer Organization [80x86]:

Goals of parallelism (Exploitation of concurrency, throughput enhancement); Amdahl‟s law;

Instruction level parallelism (pipelining, super scaling –basic features); Processor level

parallelism (Multiprocessor systems overview).

Instruction codes, computer register, computer instructions, timing and control, instruction

cycle, type of instructions, memory reference, register reference. I/O reference, Basics of

Logic Design, accumulator logic, Control memory, address sequencing, micro-instruction

formats, micro-program sequencer, Stack Organization, Instruction Formats, Types of

interrupts; Memory Hierarchy.

2018
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2017
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2016
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2015
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2014
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2013
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