Himachal Pradesh Takniki Shiksha Board | 3rd

Digital Electronics

Browse DE 3rd question papers for exam preparation and revision.

📚 Syllabus - DE (Diploma Electrical Engineering 3rd)

1. Introduction To Digital Techniques 10 hrs

Digital circuit., Digital signal, Use of digital circuit and digital signal, Advantages

and Disadvantages of Digital circuits, Number System - Introduction to Binary,

Octal, Decimal, Hexadecimal number system. Conversion of number systems,

1’s complement and 2’s complement, Binary arithmetic (addition, subtraction).

BCD code, BCD arithmetic (addition, subtraction).

 Introduction to A/D and D/A Converters.

2. Logic Gates And Boolean Algebra 09 hrs

Logical symbol, logical expression and truth table of AND, OR, NOT, NAND,

NOR, EX- OR and EX-NOR gates, Universal gates – NAND and NOR gate,

Logical circuits of basic gates using universal gates, Basic laws of Boolean

algebra, Duality theorem, De Morgan’s theorems.

3. Combinational Logic Design / Circuits 16 hrs

Simplification of Boolean expression using Boolean algebra. Construction of

logical circuits forms Boolean expressions. Boolean expressions using Sum of

products and product of sums forms. K-map representation of logical functions.

Minimization of logical expressions using K-map ( 2, 3, 4 variables).

Standardization of SOP & POS equations. Concept of Adders / Subtractors.

Truth table, K-map, Simplified logical expression and logical circuit using basic

gates and universal gates of:

 

 (a) Half adder and full adder.

 (b) Half subtractor and full subtractor.

Block diagram, Truth table, Logical expression and logic diagram of

Multiplexers (4:1 and 8:1), Multiplexer IC. Block diagram and Truth table of

Demultiplexer (1:4; 1:8; 1:16), Demultiplexer IC. Block diagram, Truth table,

working principle of Encoders & Decoders

4. Flip Flops And Sequential Logic Design 24 hrs

One-bit memory cell, clock signal, Symbol and Logic diagram using NAND

gates, working and truth table of R S flip- flop. Symbol and Logic diagram using

NAND gates, working, truth table and timing diagram of Clocked R S flip flop.

Triggering: edge triggering and level triggering, Symbol and Logic diagram using

NAND gates, working, truth table and timing diagram of J-K flip flop.Block

diagram and truth table of Master slave J-K flip flop. Symbol, working and truth

18 

table of D- flip flop and T-flip flop. Applications of flip flops, Concept, Modulus,

Working, truth table, timing diagram of a counter. Asynchronous counter (3 bit, 4

bit); Design of mod N-counter: working, truth table and timing diagram, 3-bit

Synchronous counter: working, truth table and timing diagram, Block diagram,

Working, Truth Table and waveforms of Shift register: SISO, SIPO, PISO, PIPO

(4-bit) and Universal Shift register (4-bit). Applications of Counters and

Registers.

5. Memories 05 hrs

Classification of memories RAM, ROM, PROM, EPROM, E2PROM.Circuit

diagram and working of Static and dynamic RAM 

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About This Question Paper Collection

Browse DE 3rd question papers for Diploma Electrical Engineering students at Himachal Pradesh Takniki Shiksha Board. This page helps students review question patterns, prepare for exams, and understand how previous papers are structured.

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Practicing with previous year papers for Digital Electronics gives Himachal Pradesh Takniki Shiksha Board students a clear sense of question difficulty, marks distribution, and topics that come up repeatedly.

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