Previous year question paper for DEF (BSC-IT 2nd)

Section I

FUNDAMENTAL CONCEPTS: Introduction, Digital Signals, Basic digital circuits

(AND Operation,

NOT Operation, OR Operation), NAND and NOR Operations, Exclusive - OR

Operation, Boolean

Algebra, Examples Of IC Gates.

NUMBER SYSTEMS AND CODES: Introduction, Number Systems, Binary Number

System(Binary to Decimal Conversion, Decimal to Binary Conversion), Signed Binary

Numbers(Sign Magnitude Representation, 1's Complement Representation, 2's

Complement

Representation), Binary Arithmetic (Binary Addition, Binary Subtraction, Binary

Multiplication,

Binary Division), 2's Complement Arithmetic (Subtraction using 2's Complement,

Addition/Subtraction using 2's Complement), Octal Number System(Octal to Decimal

Conversion,

Octal to Binary Conversion, Decimal to Octal Conversion, Binary to Octal Conversion,

Octal

Arithmetic, Applications of Octal Number System), Hexadecimal Number

System(Hexadecimal to

Decimal Conversion, Decimal to Hexadecimal Conversion, Hexadecimal to Binary

Conversion,

Binary to Hexadecimal Conversion, Conversion from HEX to Octal and vice versa,

Hexadecimal

Arithmetic), Codes (Straight Binary Code, Natural BCD Code, Excess-3 Code, Gray

Code, Octal

Code, Hexadecimal Code, Alphanumeric Code), Error Detecting and Error Correcting

Codes.

COMBINATIONAL LOGIC CIRCUITS: Introduction, Standard Representation for

Logical

Functions, Karnaugh Map Representations of Logical Functions (Representation of Truth

Table

on K-Map, Representation of Standard SOP Form on K-Map, Representation of Standard

POS

Form on K-Map),Simplification of Logical Functions Using K Map(Grouping two

adjacent Ones,

Grouping four adjacent Ones, Grouping 2,4 and 8 adjacent Ones), Minimization of

Logical

Functions Specified in Minterms/Maxterms or Truth Table (Minimization of SOP Form,

Minimization of POS Form), Minimization of Logical Functions not specified in

Minterms/Maxterms, Don't Care Conditions, Design Examples( Airthematic Circuits,

BCD to 7

Segment Decoder), EX-OR AND EX-NOR Simplification of K-Maps(Diagonal and

Offset

Adjacencies of Groups of Ones), Five and Six Variable K-Maps, Quine-Mc Cluskey

Minimization

Technique.

Section II

COMBINATIONAL LOGIC DESIGN USING MSI CIRCUITS: Introduction,

Multiplexers and Their

use in Combinational Logic Design ( Multiplexer, Combinational Logic Design Using

Multiplexers,

Multiplexer Tree), Demultiplexers/Decoders and their use in Combination Logic

Design(Demultiplexer, Demultiplexer Tree), Address and their use as Subtractors (Adder

with

Look Ahead Carry, Cascading of Adders, Subtraction Using Adder), BCD Arithmetic

(BCD Adder,

BCD Subtractor), Arithematic and Logic Unit(ALU).

FLIP FLOP's : Introduction, A 1-Bit Memory Cell, Clocked S-R Flip-Flop (Preset and

Clear), J-K

Flip-Flop (Race around Condition, Master Slave JK Flip Flop), D-Type Flip Flop, TType

Flip Flop,

Excitation Table of Flip Flop, Clocked Flip Flop Design (Conversion from one type of

Flip Flop to

Another Type), Edge Triggered Flip Flop's, Application of Flip Flop's (BounceElimination

Switch,

Registers, Counters, Random Access Memory).

Section III

SEMICONDUCTOR MEMORIES :Introduction, Memory Organization and Operation

(Write

Operation, Read Operation), Expanding Memory Size (Expanding Word Size, Expanding

Word

Capacity), Classification and Characteristics of Memories (Principle of Operations,

Physical

Characteristics, Mode Of Access, Fabrication Technology), Sequential Memory(Static

Shift

Register, Dynamic Shift Register), Read Only Memory (ROM Organization,

Programming

Mechanisms, ROM IC's), Read and Write Memory(Bipolar RAM Cell, MOS RAMs,

RAM ICs),

Content Addressable Memory(Operation of CAM), Charge Coupled Device

Memory(BAsic

Concept of CCD, Operation of CCD, A Practical CCD Memory Device).